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Figure 1-1 ²úƷͼʾ
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2.2ÇéÐÎÐÔÄÜÖ¸±ê
Table 2-1ÇéÐÎÐÔÄÜÖ¸±ê
²ÎÊý |
×îСֵ |
×î´óÖµ |
µ¥Î» |
ÊÂÇéÎÂ¶È |
-5 |
+60 |
¡æ |
´æ´¢ÎÂ¶È |
-40 |
+80 |
¡æ |
´æ´¢Êª¶È |
10 |
85 |
% |
ÊÂÇéµçѹ |
3.0/4.5 |
3.5/5.5 |
V |
¹¦ºÄ |
|
2.5 |
W |
Table 2-2 ¹âÐÔÄÜÖ¸±ê
²ÎÊý |
×îСֵ |
µä·¶Öµ |
×î´óÖµ |
µ¥Î» |
±¸×¢ |
|
²¨³¤¹æÄ£ |
1529 |
1550 |
1561 |
nm |
|
|
±¥ºÍÊä³ö¹¦ÂÊ |
------ |
13 |
17 |
dBm |
|
|
ÊäÈ빦ÂÊ |
-3 |
|
+9 |
dBm |
|
|
ÔëÉùϵÊý |
------ |
5 |
6 |
dB |
|
|
Êä³ö¹¦ÂÊÎȹÌÐÔ |
------ |
±0.05 |
±0.1 |
dB |
|
|
»Ø²¨ÏûºÄ (RL) |
50 |
------ |
------ |
dB |
|
|
Æ«Õñģɫɢ£¨PMD£© |
------ |
------ |
0.5 |
ps |
|
|
Æ«ÕñÏà¹ØÔöÒ棨PDG£© |
------ |
------ |
0.5 |
dB |
|
|
½Ó¿Ú |
LC/APC |
¿ÉÑ¡Ôñ |
3 µçÆø½Ó¿Ú½ç˵
Table 3-1 ¹Ü½Å½á¹¹Ê¾Òâͼ
Table3-1 ½Ó¿Ú½ç˵
Pin |
Logic |
Symbol |
Name/Description |
Plug Sequnece |
Note |
1 |
|
GND |
Module Ground |
1 |
|
2 |
|
Reserved |
No Connect |
|
|
3 |
LVTTL-I |
Mod_DeSel |
Module Deselect; when held LOW allows module to respond to serial interface |
3 |
1 |
4 |
LVTTL-O |
Interrupt |
Indicates presence of an important condition which can be read over the I2C serial interface |
3 |
2 |
5 |
LVTTL-I |
FLS |
Forced Laser Shutdown. When pin is asserted to HIGH, the pump laser is shutdown to eliminate any gain. |
3 |
1 |
6 |
|
Reserved |
No connect |
2 |
|
7 |
|
GND |
Module Ground |
1 |
|
8 |
|
VCC3 |
+3.3V Power Supply |
2 |
|
9 |
|
VCC3 |
+3.3V Power Supply |
2 |
|
10 |
LVTTL-I/O |
SCL |
I2C Serial Interface Clock |
3 |
2 |
11 |
LVTTL-I/O |
SDA |
I2C Serial Interface Data Line |
3 |
2 |
12 |
LVTTL-O |
Mod_Abs |
Indicates module is not present£¬Grounded in the module |
3 |
2 |
13 |
LVTTL-O |
Mod_NR |
Module Not Ready¡£Indicates module operational fault when pin is HIGH¡£ |
3 |
2 |
14 |
LVTTL-O |
Reserved |
Not used¡£Grounded in module¡£ |
3 |
|
15 |
|
GND |
Module Ground |
1 |
|
16 |
|
GND |
Module Ground |
2 |
|
17 |
CML-O |
RD- |
This pin is connected in series with a capacitor£¨0.1uF£© and resistor£¨51Ω£©to GND. |
3 |
|
18 |
CML-O |
RD+ |
This pin is connected in series with a capacitor£¨0.1uF£© and resistor£¨51Ω£©to GND. |
2 |
|
19 |
|
GND |
Module Ground |
1 |
|
20 |
|
Reserved |
|
3 |
|
21 |
LVTTL-I |
NC |
No Connect |
3 |
1 |
22 |
|
Reserved |
|
1 |
|
23 |
|
GND |
Module Ground |
1 |
|
24 |
PECL-I |
Reserved |
Two pins are connected to each other with resistor(100Ω) |
3 |
|
25 |
PECL-I |
Reserved |
3 |
|
|
26 |
|
GND |
Module Ground |
1 |
|
27 |
|
GND |
Module Ground |
1 |
|
28 |
CML-I |
Reserved |
This pin is connected in series with a capacitor(0.1uF) and resistor(51Ω) to GND. |
3 |
|
29 |
CML-I |
Reserved |
This pin is connected in series with a capacitor(0.1uF) and resistor(51Ω) to GND. |
3 |
|
30 |
|
GND |
Module Ground |
1 |
|
4 »úе³ß´ç
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5 ¶©¹ºÐÅÏ¢
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Êä³ö¹¦ÂÊ |
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XFP |
13£º13dBm … 17£º17dBm |
5: LC/UPC 6: LC/APC |
Important Notice
Performance figures, data and any illustrative material provided in this data sheet are typical and must be specifically confirmed in writing by F-tone Networks before they become applicable to any particular order or contract. In accordance with the F-tone Networks policy of continuous improvement specifications may change without notice.
The publication of information in this data sheet does not imply freedom from patent or other protective rights of F-tone Networks or others. Further details are available from any F-tone Networks sales representative.